Zhufei Chu, Professor, Ningbo Univ.

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E-Mail: chuzhufei@nbu.edu.cn
Phone:(+86 574)8760-9496

Research Interests:
Logic Synthesis, Physical Design, FPGA Synthesis, Emerging Nanotechnologies

Tools

ALSO: Adcanced Logic Synthesis and Optimization tool. [GitHub] [Gitee]. ★

Tutorials

  • The “Logic Synthesis Tools and Techniques: Insights from Academia and Industry” Tutorial organized by Ningbo University and Giga Design Automation is accepted for presentation at ISEDA'23 on May 8th, 2023. [handouts], [demo video].
  • An online turotial "Logic Synthesis, Optimization, and Verification" invited by Xidian University was presented on Apr. 25th, 2022.

    • Recent News

    About me

    Books

    Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipovic, and Zhufei Chu, FPGA EDA : Design Principles and Implementation, Springer, Jan. 2024.

    Publications [Google Scholar] [DBLP] ORCID iD icon[orcid]

      2024

    1. Qiyu Yang, Zheng-Dong Luo, Fei Xiao, Junpeng Zhang, Dawei Zhang, Dongxin Tan, Xuetao Gan, Yan Liu, Zhufei Chu, Yinshui Xia, and Genquan Han, "Solid-state nonvolatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors", Science China Information Sciences, 2024, Accepted for publication.
    2. Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F.Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, and Sunan Zou, "The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models", arXiv preprint arXiv:2403.07257, Mar. 2024.
    3. Ming Yan, Guanghai Dong, Yong Xiao, Yun Shao, and Zhufei Chu, " Exact Synthesis and Inversion Optimization for RM3 based Logic-in-Memory", ISEDA' 24, IEEE International Symposium of EDA, May 2024, Xi'an, China, accepted for publication.
    4. Zhang Hu, Chengyu Ma, and Zhufei Chu, " A Novel Structural Choices Generation Method for Logic Restructuring", ISEDA' 24, IEEE International Symposium of EDA, May 2024, Xi'an, China, accepted for publication.
    5. Jun Zhu, Hongyang Pan, and Zhufei Chu, " Multiplication Complexity Optimization based on Quantified Boolean Formulas", ISEDA' 24, IEEE International Symposium of EDA, May 2024, Xi'an, China, accepted for publication.
    6. Yuting Cai, Yue Wu, Xiaoyan Yang, and Zhufei Chu, " A Logic Optimization Method Using Reinforcement Learning", ISEDA' 24, IEEE International Symposium of EDA, May 2024, Xi'an, China, accepted for publication.
    7. 储著飞, 马铖昱, 闫鸣, 潘家祥, 潘鸿洋, 王伦耀, 夏银水，"基于半张量积的逻辑综合研究进展"，电子与信息学报，2024, 在线发表.
    8. Huali Duan, Erping Li, Qinyi Huang, Da Li, Zhufei Chu, Jian Wang, and Wenchao Chen, "Investigation of thermal stress effects on subthreshold conduction in nanoscale p-FinFET from Multiphysics perspective". Journal of Applied Physics, Mar. 2024, 135(10).
    9. Tiancheng Li, Erping Li, Huali Duan, Zhufei Chu, Jian Wang, and Wenchao Chen, "Artificial neural network models for metal-ferroelectric-insulator-semiconductor ferroelectric tunnel junction memristor", Microelectronics Journal, Feb. 2024, Vol 144, 106083.
    10. Hongyang Pan, Yinshui Xia, Lunyao Wang, and Zhufei Chu, "Semi-Tensor Product Based Exact Synthesis for Logic Rewriting", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , TCAD, Apr. 2024, 43(4):1093-1106.
    11. Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, and Zhufei Chu, "A Semi-Tensor Product based Circuit Simulation for SAT-sweeping", DATE' 24, 2024 Design, Automation and Test in Europe Conference, Valencia, Spain, Mar. 2024.

      12. 2023

    12. Kunmei Hu and Zhufei Chu, "An Efficient Circuit-based SAT Solver and Its Application in Logic Equivalence Checking", Microelectronics Journal, Vol 142, 106005, Dec. 2023. 
    13. Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu，"DeepGate2: Functionality-Aware Circuit Representation Learning"，ICCAD'23, 2023 International Conference on Computer-Aided Design, San Francisco, CA, USA, Nov. 2023.
    14. Hongyang Pan and Zhufei Chu, "A Semi-Tensor Product Based All Solutions Boolean Satisfiability Solver",Journal of Computer Science and Technology (JCST), 38(3):702-713, May 2023.
    15. Hongyang Pan and Zhufei Chu, "Exact Synthesis based on Semi-Tensor Product Circuit Solver", DATE' 23, 2023 Design, Automation and Test in Europe Conference, Antwerp, Belgium, Apr. 2023.
    16. Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, and Zhufei Chu, "Semi-Tensor Product based Circuit Simulation for SAT sweeping ", IWLS' 23, International Workshop on Logic & Synthesis, June 2023, Lausanne, Switzerland.
    17. Sen Liu, Hongyang Pan, Yinshui Xia, Lunyao Wang, and Zhufei Chu, "Multiplicative Complexity Optimization Based on Boolean-Difference Resubstitution", IWLS' 23, International Workshop on Logic & Synthesis, June 2023, Lausanne, Switzerland.
    18. 储著飞、洪庆辉、李冰、刘成、尹勋钊、岳金山、张吉良、卓成、李华伟，"存内计算研究进展与发展趋势"，2021-2022中国计算机科学技术发展报告(纸质版), 2023年5月, pp. 195-252.
    19. 张健、蔡少伟、陈振邦、贺飞、李占山、马菲菲、吴志林、钟卓炜、储著飞，"约束求解技术与应用"，2021-2022中国计算机科学技术发展报告(电子版), 2023年5月, pp. 1-47.
    20. Chunliu Liao, Yong Xiao, Yun Shao, and Zhufei Chu, " Improved Depth-Aware Circuit Partitioning for Mixed Logic Synthesis", ISEDA' 23, IEEE International Symposium of EDA, May 2023, pp.170-173, Nanjing, China.
    21. Chengyu Ma, Yong Xiao, Yun Shao, and Zhufei Chu, "An Integrated Logic Function Decomposition Flow for XOR-Majority Graphs", ISEDA'23, IEEE International Symposium of EDA, May 2023, pp. 146-149, Nanjing, China. (Honorable Paper Award) ★
    22. 储著飞，潘鸿洋，"基于布尔可满足性的精确逻辑综合综述"，电子与信息学报，2023, 45(1):14-23. (Invited)
    23. Ruibing Zhang, Hongyang Pan, and Zhufei Chu, "Logic Circuit Simulation based on Semi-Tensor Product", CSTIC' 23, China Semiconductor Technology International Conference, June 2023, Shanghai, China.
    24. Kunmei Hu and Zhufei Chu, " CirSAT: An Efficient Circuit-based SAT Solver via Fanout-driven Decision Heuristic", CSTIC' 23, China Semiconductor Technology International Conference, June 2023, Shanghai, China.

      25. 2022

    25. Zhufei Chu, Chuanhe Shang, Tingting Zhang, Yinshui Xia, Lunyao Wang, and Weiqiang Liu, "Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Dec. 2022, 30(12):1827-1839.
    26. 朱柏成，储著飞，潘鸿洋，王伦耀，夏银水，基于XMG的乘法器电路等价性验证算法，计算机辅助设计与图形学学报，2022，录用待发表.
    27. 赵子豪，储著飞, 王伦耀，夏银水，多级混合极性Reed-Muller逻辑电路功耗优化，计算机辅助设计与图形学学报，2022，录用待发表.
    28. Qing Wan, Changjin Wan, Huaqiang Wu, Yuchao Yang, Xiaohe Huang, Peng Zhou, Lin Chen, Tian-Yu Wang, Yi Li, Kanhao Xue, Yuhui He, Xiangshui Miao, Xi Li, Chenchen Xie, Houpeng Chen, Zhitang Song, Hong Wang, Yue Hao, Junyao Zhang, Jia Huang, Zheng Yu Ren, Li Qiang Zhu, Jianyu Du, Chen Ge, Yang Liu, Guanglong Ding, Ye Zhou, Su-Ting Han, Guosheng Wang, Xiao Yu, Bing Chen, Zhufei Chu, Lunyao Wang, Yinshui Xia, Chen Mu, Feng Lin, Chixiao Chen, Bojun Cheng, Yannan Xing, Weitao Zeng, Hong Chen, Lei Yu, Giacomo Indiveri and Ning Qiao, "2022 roadmap on neuromorphic devices & applications research in China " (Section 12: Automated synthesis and mapping), Neuromorphic Computing and Engineering, 2022, 2(4): 042501. (Invited)
    29. Chenghao Yang, Yinshui Xia, Zhufei Chu, and Xiaojing Zha "Logic Synthesis Optimization Sequence tuning using RL-based LSTM and Graph Isomorphism Network", IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), Aug. 2022, 69(8):3600-3604.
    30. Peng Liu, Jianguo Ni, and Zhufei Chu, "Wire-crossings Optimization Based on Majority-of-five and XOR-of-three Primitives in QCA ", International Journal of Theoretical Physics, Mar. 2022, 61(3): 1-22.
    31. Xiang He and Zhufei Chu, "Stochastic Circuit Synthesis via Satisfiability", Integration, the VLSI Journal, May 2022, 84:84-91.
    32. Hongwei Zhou, Yong Xiao, Yun Shao, and Zhufei Chu, "Area-aware optimization of XOR-AND Graph based on Reed-Muller logic expansion", CSTIC' 22, China Semiconductor Technology International Conference, Mar 2022, Hangzhou, China.
    33. Liangtao Shi, Yong Xiao, Yun Shao, and Zhufei Chu, "Using Mixed Logic Synthesis Tools in Open-Source FPGA Design Framework", CSTIC' 22, China Semiconductor Technology International Conference, Mar 2022, Hangzhou, China.

      34. 2021

    34. 储著飞，王伦耀，夏银水，"基于多逻辑域的逻辑综合研究进展"，微纳电子与智能制造，2021, 3(2):64-73. (Invited)
    35. Hongyang Pan and Zhufei Chu, "A Semi-Tensor Product Based SAT All Solutions Solver", CCFDAC'21, CCF Integrated Circuit Design and Automation Conference, Oct. 2021, Wuhan, China. (Best Paper Award) ★
    36. Hui-Ming Tian and Zhu-Fei Chu, "Inversion Optimization Strategy based on Primitives with Complement Attributes", Journal of Computer Science and Technology (JCST), Sep. 2021, 36(5):1145-1154.
    37. Xiao-Jing Zha, Yin-Shui Xia, Shang-Luan Xie, and Zhu-Fei Chu, "Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization", Journal of Computer Science and Technology (JCST), Sep. 2021, 36(5):1118-1132.
    38. Jianguo Ni, and Zhufei Chu, "An Efficient Demultiplexer Design in Quantum-dot Cellular Automata", ASICON'21 , IEEE 14th International Conference on ASIC, Oct. 2021, Virtual online.
    39. Chuanhe Shang, and Zhufei Chu, "Design of Majority Logic Based 4-bit Approximate Subtractors and Its Application in Divider ", ASICON'21 , IEEE 14th International Conference on ASIC, Oct. 2021, Virtual online.
    40. Xuan Wang, Zhufei Chu, and Weikang Qian, "MinSC: An Exact Synthesis-Based Method for Minimal Area Stochastic Circuits under Relaxed Error Bound", ICCAD' 21, International Conference On Computer Aided Design, Nov. 2021, Virtual online.
    41. Zhufei Chu, Zeqiang Li, Yinshui Xia, Lunyao Wang, and Weiqiang Liu, "BCD Adder Designs based on Three-Input XOR and Majority Gates", IEEE Transactions on Circuits and Systems II: Express Briefs(TCAS-II), June 2021, 68(6):1942-1946.
    42. Huiming Tian, and Zhufei Chu, "A Novel Toffoli Gate Design Using Quantum-dot Cellular Automata", CSTIC' 21, China Semiconductor Technology International Conference, Mar 2021, Shanghai, China.
    43. Xiang He, and Zhufei Chu, "Stochastic Circuit Design Based on Exact Synthesis", CSTIC' 21, China Semiconductor Technology International Conference, Mar 2021, Shanghai, China.

      44. 2020

    44. Zhufei Chu, Mathias Soeken, Yinshui Xia, Lunyao Wang, and Giovanni De Micheli, "Advanced Functional Decomposition Using Majority and Its Applications", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), August 2020, 39(8):1621-1634.
    45. Huiming Tian, Zhufei Chu, "Inversion Optimization Strategy based on Primitives with Complement Attribute", CCFDAC'20, CCF Integrated Circuit Design and Automation Conference, Aug. 2020, Beijing, China.
    46. Zhufei Chu, Huiming Tian, Zeqiang Li, Yinshui Xia, and Lunyao Wang, "A High-Performance Design of Generalized Pipeline Cellular Array", IEEE Computer Architecture Letters, Jan.-June 1 2020, 19(1):47-50.
    47. Lin Chen, and Zhufei Chu, "Towards Optimal Logic Representations for Implication-based Memristive Circuit", CSTIC' 20, China Semiconductor Technology International Conference, Mar 2020, Shanghai, China.
    48. Zeqi Chen, Jianping Hu, Hao Ye, and Zhufei Chu, "T-Channel Field Effect Transistor with Three Input Terminals (Ti-TcFET)". Micromachines. Jan. 2020, 11(1):64.

      49. 2019

    49. Zhufei Chu, Lei Shi, Lunyao Wang, and Yinshui Xia, " Multi-Objective Algebraic Rewriting in XOR-Majority Graphs", Integration, the VLSI Journal, 69:40-49, Sep. 2019.
    50. Libo Qian, Kefang Qian, Xitao He, Zhufei Chu, Yidie Ye, Ge Shi, and Yinshui Xia, "Through Silicon Via based Capacitor and Its Application in LDO Regulator Design", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 27(8):1947-1951, 2019.
    51. Zhufei Chu, Winston Haaswijk, Mathias Soeken, Lunyao Wang, Yinshui Xia, and Giovanni De Micheli, "Exact Synthesis of Boolean Functions in Majority-of-five Forms", ISCAS' 19, IEEE International Symposium on Circuits and Systems, May 2019, Sapporo, Japan.
    52. Lei Shi, and Zhufei Chu, "Inversions Optimization in XOR-Majority Graphs with an Application to QCA", CSTIC' 19, China Semiconductor Technology International Conference, Mar 2019, Shanghai, China.
    53. Zhufei Chu, Mathias Soeken, Yinshui Xia, Lunyao Wang and Giovanni De Micheli, "Structural Rewriting in XOR-Majority Graphs ", ASPDAC' 19, Asia and South Pacific Design Automation Conference, Jan 2019, Tokyo, Japan.
    54. Qiuhong Ying, Lunyao Wang, Zhufei Chu, and Yinshui Xia, "Area Optimization of MPRM Circuits Using Approximate Computing", ASICON' 19, International Conference on ASIC, Oct 2019, Chongqing, China.

      55. 2018

    55. Qi Yu, Lunyao Wang, Zhufei Chu, and Yinshui Xia , " Approximate Computing for 4-bit Adder Design ", ICSICT' 18, The 14th International Conference on Solid-State and Integrated Circuit Technology, Oct. 2018, Qingdao, Shandong, China.
    56. Zeqiang Li, Zhufei Chu, Yinshui Xia and Lunyao Wang, "Efficient Design of Decimal Full Adder Using Quantum-dot Cellular Automata ", ICSICT' 18, The 14th International Conference on Solid-State and Integrated Circuit Technology, Oct. 2018, Qingdao, Shandong, China.
    57. Zhufei Chu, Mathias Soeken, Yinshui Xia and Lunyao Wang, "Structural Rewriting in XOR-Majority Graphs ", IWLS' 18, International Workshop on Logic & Synthesis, June 2018, San Francisco, CA, USA.
    58. Zhufei Chu, Mathias Soeken, Yinshui Xia and Giovanni De Micheli, "Functional Decomposition Using Majority", ASPDAC' 18, Asia and South Pacific Design Automation Conference, Jan 2018, Jeju Island, Korea.

      59. 2017

    59. Zhufei Chu, Mathias Soeken, Yinshui Xia and Giovanni De Micheli, "Functional Decomposition Using Majority", IWLS' 17, International Workshop on Logic & Synthesis, June 2017, Austin, TX, USA.
    60. Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Amaru, Yinshui Xia, Paolo Ienne, Giovanni De Micheli and Pierre-Emmanuel Gaillardon, "Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains", GLSVLSI' 17, ACM Great Lakes Symposium on VLSI, May 2017, Banff, Alberta, Canada.
    61. Jibo Wang, Yinshui Xia, Zhufei Chu, and Lunyao Wang, "Fast Cells Defect-Tolerant Mapping Based on Gate Node Interval Selection in CMOL Circuits", Journal of Computer-Aided Design and Computer graphics, 29(1):172-179, Jan 2017. (in Chinese)

      62. 2016

    62. Zhufei Chu, Yinshui Xia, Lunyao Wang and Jian Wang, " Efficient power pad assignment for multi-voltage SoC and its application in floorplanning", International Journal of Circuit Theory and Applications, 44(8): 1533–1550, 2016.
    63. Zhufei Chu, Yinshui Xia and Lunyao Wang, " Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergence ", Integration, the VLSI Journal, 52:335-346, Jan 2016.

      64. 2014

    64. Zhufei Chu, Yinshui Xia, Lunyao Wang and Jian Wang, "Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engine", Microelectronics Journal, 45(4):382-393, Apr. 2014.
    65. Zhufei Chu, Yinshui Xia, Lunyao Wang, and Jun Zhai "Wire-bonding Power Pad Assignment and Power Mesh Topological Optimization for Multiple Voltage SoC", Journal of Computer-Aided Design and Computer graphics, 26(9):1501-1508, Sep 2014.
    66. Zhufei Chu, Yinshui Xia, Lunyao Wang, " Level shifter planning for timing constrained multi-voltage SoC floorplanning ", GLSVLSI' 14, ACM Great Lakes Symposium on VLSI, May 2014, Houston, USA, pp.329-334.

      67. Before 2014

    67. Zhufei Chu, Yinshui Xia，William N. N. Hung, Xiaoyu Song and Lunyao Wang, “ Timing-driven logic restructuring for nano-hybrid circuits ”, International Journal of Electronics, 100(5):669-685, May 2013.
    68. Zhufei Chu, Yinshui Xia and Lunyao Wang, “Cell mapping for nanohybrid circuit architecture using genetic algorithm”，Journal of Computer Science and Technology, 27(1):113-120, Jan. 2012.
    69. Yinshui Xia, Zhufei Chu, William N. N. Hung, Lunyao Wang and Xiaoyu Song, “An integrated optimization approach for nanohybrid circuit cell mapping ”，IEEE Transactions on Nanotechnology, 10(6):1275-1284, Nov. 2011.
    70. Lunyao Wang, Zhufei Chu, and Yinshui Xia, "Low power state assignment algorithm for FSMs considering peak current optimization", Journal of Computer Science and Technology, 28(6):1054-1062, Nov. 2013.
    71. Zhufei Chu, Yinshui Xia, Lunyao Wang and Jian Wang, "Voltage drop aware power pad assignment and floorplanning for multi-voltage SoC designs", 13th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics 2013), Nov. 2013, Hongkong, pp. 87-94.
    72. Zhufei Chu, Yinshui Xia, William N. N. Hung, Lunyao Wang and Xiaoyu Song , “A memetic approach for nanoscale circuit cell mapping”，13th EUROMICRO Conference on Digital System Design (DSD 2010), Sep. 2010, Lille, France.
    73. Zhufei Chu, Yinshui Xia, Lunyao Wang and Meiqun Hu, “CMOL cell assignment based on dynamic interchange”，Proceedings 2009 8th IEEE International Conference on ASIC (ASICON 2009)，Oct. 2009, Changsha, China.
    74. Yinshui Xia, Zhufei Chu, William N. N. Hung, Lunyao Wang and Xiaoyu Song, “CMOL cell assignment by genetic algorithm”，8th IEEE NEWCAS Conference (NEWCAS 2010)，Jun. 2010, Montreal, Canada.
    75. Zhufei Chu, Yinshui Xia and Lunyao Wang, "Fast mapping of Nano/CMOS cells", Journal of Computer-Aided Design and Computer graphics, 23(3):514-520, Mar 2011.
    76. Yinshui Xia, Zhufei Chu, Lunyao Wang, William N N Hung and Xiaoyu Song, "Logic Equivalent Transformation for Nano-meter CMOS Hybrid Circuits", Journal of Electronics and Information Technology, 33(7):1733-1737, July 2011.

    Professional Services

    Links

    Address

    Yuxiu Road 505, Zhenhai, Ningbo, 315211
    Faculty of Electrical Engineering and Computer Science (EECS)
    Ningbo Univeristy, Zhejiang, China